Silicon dies may include a plurality of conductive layers that form circuit components and traces coupling the components, and these conductive layers may be separated by layers of dielectric material. Vias extend through the dielectric material to electrically interconnect the various layers. One side of the die, which may be referred to as the front side of the die, includes a plurality of electrical contacts for coupling the die to its package, and then an external circuit, on a motherboard, for example. The opposite side of the die, which may be referred to as the back side of the die, may include connections comprising through-silicon vias, such that a subsequent die may be directly mounted to the backside of the first die, with electrical connections between the two die. Through-silicon vias provide a direct connection between circuits on one die to circuits on the second die.
In top level chip design, decisions must be made regarding the pathways used to connect circuit components on each layer of the die with one another and with elements on different layers of the die. With higher levels of silicon integration and the use of wider buses, it is becoming increasingly difficult to route all required interconnections using the available layers. It sometimes becomes necessary to add additional metal layers to a die to accommodate the required intra-die interconnections. Adding additional layers, however, increases the manufacturing cost of the die. It would therefore be desirable to provide an arrangement that allows for additional interconnections and/or more flexibility in routing connections between circuit components on a die without adding additional metal layers to the die.